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Adaptive Silicon's MSA 2500 Programmable Logic Core TSMC Test Chips Are Fully Functional
Adaptive Silicon's MSA 2500 Programmable Logic Core TSMC Test Chips Are Fully Functional
"With the qualification of TSMC's 0.18 micron process, our customers now have another reliable manufacturing option to increase the flexibility of their designs by embedding re-programmability for critical functions of their SoC devices," commented Tim Garverick, Adaptive Silicon's president and COO. By architecting a family of products with embedded programmable logic, it is possible to produce a number of different silicon products from a single die, avoiding the increasing costs of masks, prototype silicon and parallel engineering development efforts. Embedded programmable logic also permits high-risk blocks of a SoC device to be modified after first silicon is produced. Consequently, such devices may be fabricated earlier in the development process without risking modification of the overall design and re-spinning the silicon. Embedding programmable logic also provides the flexibility to modify devices once shipped to customers to upgrade algorithms or accommodate changes in standards or protocols in applications like communications and image processing. ASi received its seed funding in July, 1999 and taped-out its first silicon less than twelve months later for LSI Logic's G12, 0.18 micron process. In December, 2000, ASi completed the closing of an additional $8.3 million in funding. In January, 2001, the TSMC process port was completed, and the design taped-out for test chips. About Adaptive Silicon, Inc. For more information, contact: North America © Copyright 2001, Adaptive Silicon. All rights reserved Programmable Logic Core and PLC are trademarks of Adaptive Silicon, Inc.
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