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ChipVision Delivers Two Breakthrough ESL Power-Optimization Design Tools for Meeting Critical Power Budgets (Apr. 22, 2008)
The new tools are ideal for companies developing mobile communications, networking, consumer or automotive applications that need extended battery life or reduced cooling requirements. |
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CoWare Introduces First Ever Checkpoint / Restart Capability for Native SystemC Virtual Platforms (Apr. 14, 2008)
CoWare announced today the first ever checkpoint/restart capability for native SystemC Virtual Platforms. |
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NXP and CoWare Establish Strategic Relationship for the Company Wide Deployment of ESL Technologies (Apr. 07, 2008)
The strategic, multi-year relationship covers a broad spectrum of ESL technologies from CoWare as well as a major services agreement to support the rapid deployment of these technologies across NXP's business units. |
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CoWare and Sonics Release ESL 2.0 Upgrade of Joint Flow (Mar. 26, 2008)
Sonics SMART Interconnect Integration with CoWare ESL 2.0 Solution Provides Faster Time-to-Market for Production Designs |
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VaST and NEC Electronics America Develop Models of V850-Based Microcontrollers for Leading Automotive Customers (Mar. 17, 2008)
VaST Systems and NEC Electronics America today announced the availability and development of virtual models of NEC Electronics’ 32-bit V850™-based microcontroller units (MCUs). |
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Axilica Offers tool for behavioral synthesis of hardware designs from UML (Mar. 10, 2008)
FalconML is a powerful new tool developed by Axilica to deliver behavioural synthesis of FPGA or ASIC-directed hardware designs from UML. |
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CoWare Announces System-Level Design Solutions for Android-based Products (Feb. 27, 2008)
CoWare announced today its solution for the rapid design and development of chipsets, handsets and software applications built to support the Android™ Mobile Platform. |
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Aldec Releases Riviera-PRO(TM) 2008.02 with VHDL 2007, SystemC 2.2 and SystemVerilog (DPI) (Feb. 25, 2008)
Riviera-PRO offers mixed language verification support for VHDL, Verilog®, SystemVerilog and SystemC for behavioral, structural and timing simulation of multi-million gate ASIC and FPGA designs. |
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Carbon Becomes Fujitsu Cedar-ESL Services Partner (Feb. 20, 2008)
Carbon’s automatic model generation technology has been integrated into Fujitsu’s CedarTM-ESL Services. Carbon Model Studio creates SystemC models for electronic system level (ESL) environments, including those from ARM, CoWare, Synopsys, VaST and others, for Fujitsu’s application specific integrated circuit (ASIC) customers. |
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Synfora Moves Algorithmic Synthesis to the Next Level with PICO Extreme (Feb. 14, 2008)
PICO Extreme’s recursive system composition methodology is enabled by TCABs – tightly coupled accelerator blocks – that allow users to designate parts of their algorithm as custom building blocks. |
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EVE and CoWare Forge Strategic Alliance (Jan. 21, 2008)
EVE and CoWare today announced a strategic alliance to provide design teams with an integrated approach that ties hardware/software co-verification from EVE with SystemC virtual platforms developed with CoWare’s ESL 2.0 solutions. |
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CoWare and STARC Integrate SystemC TLM Methodology (Jan. 21, 2008)
CoWare announced the collaboration with STARC to support CoWare’s open SystemC modeling library APIs for the creation of reusable virtual platforms for architecture design and software development. |
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Esterel Studio, adopted at STMicroelectronics, enhances productive design for STBus and STNoC based control-intensive IP (Jan. 18, 2008)
Esterel EDA Technologies today announced that STMicroelectronics has applied Esterel Studio for the design of new components for the STBus and ST Network-on Chip (STNoC) within ST’s On-Chip Communication Systems (OCCS) team. |
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Synfora Integrates PICO Express with CoWare ESL 2.0 Solutions (Jan. 16, 2008)
Joint customers will use Synfora’s PICO Express to create synthesizable RTL and the corresponding transaction-level SystemC models from an untimed C algorithm for product-specific intellectual property (IP), and reuse them in combination with other ESL models in CoWare’s Platform Architect to capture the entire product platform at the system-level. |
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Mentor Graphics and Calypto Design Systems Announce Customer-Proven Electronic System Level Synthesis and Verification Flow Featuring Catapult C Synthesis and SLEC Sequential Equivalence Checker (Jan. 14, 2008)
Proven during trials at customer sites throughout the world and recently by STARC, the integrated flow is effective at synthesizing high-quality designs from pure ANSI C++ to RTL, and formally verifying that the resulting RTL design is functionally correct |
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Open SystemC Initiative Advances IP Interoperability and Reuse with New Draft Standard for Transaction-Level Modeling (Dec. 04, 2007)
SystemC users urged to provide feedback on TLM-2 Draft 2 by January 31st |
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Synplicity Joins Xilinx ESL Design Ecosystem (Nov. 26, 2007)
The Synplify DSP environment facilitates high-level modeling and hardware abstraction, constraint-driven algorithm synthesis into RTL and powerful system-wide optimizations for performance, area, and multi-channelization tradeoff exploration. |
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CoWare and Tensilica Integrate Diamond Standard 106Micro with CoWare ESL 2.0 Technology (Nov. 20, 2007)
The integration provides designers with the first and most productive ESL 2.0 solution for platform architecture design, platform verification, and software development using Tensilica’s processor core with the smallest area, lowest power, and highest performance on the market. |
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Virtutech Accelerates and Streamlines Development of Applications for Next-Generation of IBM PowerPC Processor Cores (Nov. 14, 2007)
Virtutech today announced that its Simics™ product has been selected by IBM to create advanced, system-level simulation models for IBM’s next-generation embedded processor cores, beginning with the PowerPC 464FP core. |
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Carbon Design Systems Adds Support for Latest Version of ARM Tools (Nov. 12, 2007)
Its Carbon Model Studio generates hardware-accurate software models that integrate into RealView SoC Designer 7.0 release for rapid development and assembly of virtual platforms to explore architectural tradeoffs and perform pre-silicon software development. |
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Verification Library Accelerates OCP System Designs (Nov. 02, 2007)
JEDA Technologies today announced the availability of OCPchecker, a system-level verification library for Open Core Protocol (OCP) based system designs in SystemC. |
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CoWare and Carbon Design Systems Team to Accelerate Availability of Virtual Hardware Platforms for Architecture Design and Software Development (Oct. 29, 2007)
Components generated by Carbon Model Studio plug directly into CoWare’s standards-based SystemC environment and can be distributed to software users worldwide. Carbon Model Studio’s graphical user interface enables the user to create a Carbon model, configure its software-visible registers, and link with Platform Architect’s transaction-based interfaces for reuse across multiple abstraction levels and interconnects. |
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CoWare Platform-driven ESL Design Methodology Reduces Design Cycles for IBM PowerPC 440 and IBM CoreConnect(TM)-based Applications (Sep. 24, 2007)
IBM PowerPC 440 Processor Support Package and IBM CoreConnect Bus Library Are Latest Additions to CoWare’s Fast-Growing, SystemC-based Model Library |
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CoWare Collaborates with STMicroelectronics to Create an Advanced ESL Design Automation Environment for ST's Next Generation Custom Processors (Sep. 17, 2007)
CoWare announced it has collaborated successfully with STMicroelectronics to create an advanced ESL design automation environment based on CoWare's Processor Designer and CORXpert(TM) Personalization Kit for STMicroelectronics custom processors. |
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Synopsys Announces DesignWare System-Level Library (Sep. 17, 2007)
The library provides high- performance SystemC transaction-level simulation models (TLMs) for assembling virtual platforms, including instruction set simulators (ISS), and TLMs of Synopsys' DesignWare Cores and ARM® AMBA® interconnect components. All DesignWare System-Level Library models are written in SystemC and work in IEEE 1666 (SystemC) compliant simulation environments, making them tool- independent. |
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Accellera Approves Functional Design Verification Standard (Aug. 23, 2007)
The Accellera OVL standard includes a library of assertion checkers provided as an open standard. It improves electronic design verification when using Hardware Description Languages (HDLs) and results in better quality designs by enabling effective use of ABV methodologies. |
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HD Lab, Inc. Releases "SystemC Behavioral Synthesis Style Guide" (Jul. 23, 2007)
As compared to traditional RTL-based design methods, the SystemC design methodology described can yield significant savings in overall design cycle time anywhere from 1/3 to 1/2. The guide includes examples of design blocks in excess of 3 million gates being designed using SystemC descriptions. The guide also follows and implements JEITA SystemC working group’s proposal on behavioral synthesis guidelines. |
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Forte Announces Cynthesizer 3.3 with First SystemC to GDSII Flow; Adds SystemC Behavioral IP Library and Graphical Analysis Environment (Jun. 07, 2007)
Forte Design Systems today announced the availability of version 3.3 of its Cynthesizer™ SystemC synthesis product. Cynthesizer v3.3 is the first high-level synthesis product to offer a direct path from high-level SystemC to GDSII by integrating Cynthesizer and Magma Design Automation's Blast Create™ synthesis technology and Blast Fusion® place-and-route technology. |
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Sonics Plus Partners Equals Complete ESL Strategy (Jun. 05, 2007)
Key enhancements in SonicsStudio 4.6 include the availability of ''SystemC-only'' versions of customer configured SMART Interconnects for integration into partner ESL environments, generation of ''black box'' Sonics SystemC models for software developers, support for automated adaptation between different transaction layer modeling (TLM) abstractions, and methodology improvements to ensure cycle accuracy of Sonics' SystemC models. |
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CoWare, AXE, and BeatCraft Integrate CoWare Virtual Platform, axLinux and JAKAR Media Framework (Jun. 05, 2007)
The Integration Reinforces the Value of Virtual Platforms for Software Development and Extends CoWare's Ecosystem for the Delivery of Software-Driven Architecture Development Solutions |
