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Headline (March 2005)      Sign Up for SoC News Alert
   Headlines for Mar. 31, 2005
  • New Fabless Semiconductor Company, Ambric, Inc., Brings on Jerry Ardizzone, Former President of ARM USA as VP of Sales
  • Transmeta and Sony Group Reach Agreement on Multi-Year Strategic Alliance
  • Transmeta Corp. Names Arthur L. Swift as President & CEO
  • Transmeta Announces Strategic Restructuring Plan
  • Brave New World -- lawyers may become more important than engineers
  • Axeon and Infineon unveil embedded machine learning system
  • Patriot Scientific Says Licensing Agreements Result in Quarterly Profit
  • ARC Brings the Power of Configurable Processor Technology to Japan
  • ARC International Announces Strategic Partnerships with Kogent and NSW to Service Growing Japanese Consumer Electronics Market
  • ARC International and Green Hills Software Announce Enhanced MULTI Development Environment for Configurable ARC Processors
  • Availability of low-cost PCI Express Design Kit through HiTech Global Distribution
  • Faraday Announces the Industry's Smallest 0.18um Library-miniLib
  •    Headlines for Mar. 30, 2005
  • IP Reuse Can Usher in a Renaissance
  • Elpida, Toshiba claim world's fastest DRAMs based on the XDR memory interface technology from Rambus Inc
  • Silicon Storage Technology (SST) Updates Guidance on Expected First Quarter 2005 Results
  • Via Licensing Announces Availability of Joint Patent License for AVC (H.264) Video Compression Standard
  • Mentor Graphics Donation of SystemVerilog Assertion (SVA) Version of Open Verification Library Accepted by Accellera
  • ZAiQ Technologies and S2C Inc. Collaborate on a Transaction-Based SoC Design and Validation System
  • Shareholders Approve Cadence's Acquisition of Verisity
  • Actel and Prover Technology Announce Equivalence Checking Support for Actel Design Flows
  •    Headlines for Mar. 29, 2005
  • FSA and IEE Announce 2005 IEE/FSA International Semiconductor Executive Forum
  • SafeNet Announces QuickSec IKEv2 Toolkit
  • Xilinx Extends Low Cost Leadership With New ISE WebPACK 7.1i
  • Tower Semiconductor Board Approves 2005 Operating Plan Focused On Maximizing Operational Efficiencies
  • FS2 System Navigator Delivers Debugging for SOCs with Multiple Tensilica Xtensa Processors
  • SMIC reports 2004 fourth quarter results
  • Renesas Technology Releases "Mobile Videophone Middleware Package" SH-Mobile Application Processor Software
  •    Headlines for Mar. 28, 2005
  • Heavy rules hold back 90-nm yield
  • Flexible 'partner' chip can be an SoC's best friend
  • China gains in 2004 pure-play foundry rankings
  • China microprocessor developer scrambles for funds
  • Chartered Details Comprehensive Market-Specific Solutions for High-Volume Consumer and Wireless Products
  • Analyzer gets early eye on SystemC code
  • MIPS spins China shop for hard-core projects
  • Faraday Offers Peripheral Composer, the Fastest Time-to-Market Structured ASIC for Peripheral Interface Chips
  • Tensilica Xtensa LX Processor Beats All Other Processors and Cores On EEMBC Office Automation Benchmark
  • Shanghai Jiao Tong University Licenses MIPS Processor for its DTV Product Development
  • ARC International Appoints Consumer Marketing Executive to Drive the Company's Multimedia Programs
  •    Headlines for Mar. 25, 2005
  • Design at the System Level
  •    Headlines for Mar. 24, 2005
  • USDC Contracts with Next Sierra to Develop OLED Driver Chips
  • Interview: Rambus' chairman looks to the future -- Geoff Tate discusses shortage of U.S. engineers, market opportunities and demand from chipmakers
  • FS2 Announces Ethernet Enabled Solutions for Altera Nios II; Probe is Now a Shared Resource, Cost Effective, Offers Remote Log-On
  • Configurable processor scores best in office test, Tensilica says
  • Xilinx Demonstrates 1 To 5 Watts Lower Power Per FPGA In Virtex-4 Family Compared To Competing FPGAs
  • NEC Electronics Embeds MoSys' 1T-SRAM Memory Technology in 90nm Custom ASIC; Companies Extend Agreement To Use 1T-SRAM In Upcoming Consumer Applications
  • Cisco selects nSys for its PCI Express Interface verification
  •    Headlines for Mar. 23, 2005
  • Gartner's Final Semiconductor Vendor Market Share Results Shows Industry Grew 23 Percent in 2004
  • TSMC to open design center in Shanghai, says report
  • Ericsson sues UK based mobile phone company Sendo for patent infringement
  • TSMC exec calls for proactive measures on IP
  • Rambus announces its customers have shipped more than 500 million memory devices
  • Cambridge Consultants doubles US office
  • Running System Debugging Support in ARM RealView Developer Suite Now Available for Accelerated Technology's Nucleus PLUS
  • Dolphin Integration Announces a Breakthrough for an Embedded Output Converter for high quality Audio
  •    Headlines for Mar. 22, 2005
  • IntelliProp Introduces OEM Solutions for Consumer Electronics Storage Applications
  • Proactive approach needed to overcome 90-nm quality challenges, experts say
  • Renesas Technology Integrates Mentor Graphics 0-In Assertion Synthesis for Assertion Based Verification Flow
  • Open-Silicon Licenses Multiple RaSer Serial Link Cells Under the Cadence-Rambus Reseller Program
  • eASIC Expands its Global Presence to Korea By Signing An Agreement with Advanced Design Technology (ADT)
  • ISQED panel takes on IP roadblocks
  • Xelic Announces SONET/SDH Tributary Payload Processor Core Availability for Integration into ASIC or FPGA Networking Applications
  •    Headlines for Mar. 21, 2005
  • Poseidon Design Systems Appoints Douglas Fairbairn, Industry Notable and Chairman Of Verisity, to its Board Of Directors
  • TTPCom announces appointment of non-executive Director
  • Altera Ships 10 Millionth Cyclone FPGA to Harmonic Inc.
  • Zoran's COACH 7 Processor Powers Samsung's New 7 and 5 Megapixel Digital Cameras
  • Conexant and Interpeak Launch 802.11 Wireless Solution for Embedded Developers
  • Dr. Edward C. Ross, President Emeritus of TSMC, Joins Open-Silicon Board of Directors
  • UMC considers taking 15% stake in Chinese fab
  • WISchip Rolls Out New System-on-Chip Streaming Media Encoding Solution
  • Zoran Corporation Licenses Kilopass' XPM Memory Technology; Standard CMOS Technology Adds On-Chip Security ID to Digital Entertainment Products
  • Silicon Design Chain Collaboration Demonstrates Significant 90-nanometer Total Power reduction; Applied Materials, ARM, Cadence and TSMC Integrated Capabilities Deliver Silicon-Validated Power Reduction
  • Tower Semiconductor Honored by ON Semiconductor for Outstanding Support
  • LTRIM LTR1761 LDO Voltage Regulator IP Available for IBM 0.13um Process Technology
  • MoSys Signs First EDA to Its International Sales Representative Network; Newest Partnership Covers UK and Ireland
  • Altera Demonstrates Industry's First FPGA Solution Enabling Video-Over-IP at CCBN
  • Architectures: On-chip interconnect gets off the bus
  • The Great Debate: SOC vs. SIP
  • FPGA merger with processors gathers steam
  • Infineon Technologies and Rambus Conclude Broad Licensing Agreement
  • Rambus Updates First Quarter 2005 Financial Guidance
  • Structured ASICs walk a fine line
  • Teldix Selects Actel's ProASIC Plus FPGAs for Multi-Processor Boards Used in the Eurofighter Project
  •    Headlines for Mar. 18, 2005
  • eSOL Forms Strategic Partnership with MoreThanIP to Offer a Versatile TCP/IP Solution for Altera's Nios II Soft Core Processor
  • System-in-package (SIP) may not be that simple
  •    Headlines for Mar. 17, 2005
  • ChipX Accelerates Development of XM Satellite Radio Receivers; ChipX Structured ASICs Provide Fast Turnaround Time, Low Risk to High-volume Production
  • EDA exec offers alternative IP channel
  • Xilinx R&D Center in India Helping Customers Worldwide Benefit From Programmable Chip Technologies; Creates 12 IP Cores in First Year of Operation Through Partnership with CMC
  • Rambus Opens Design Center In Bangalore, India
  •    Headlines for Mar. 16, 2005
  • RF Engines contracted to supply signal processing cores to leading mobile telecommunications company
  • CEVA to file Form 12b-25 With the Securities and Exchange Commission
  • Fabless firms outpace IDMs in costs, gross margins
  • Huaya Microelectronics Ltd Licenses MIPS Processor for Its DTV Products
  •    Headlines for Mar. 15, 2005
  • VeriSilicon Announced Release of Library Products for HeJian Technology 0.18 and 0.25 micron Process Technology
  • Virtio Jumpstarts Mobile Multimedia with Support for Texas Instruments OMAPV1030 Platform
  • SeaSolve Software Inc. Announces IEEE 802.15.4 WPAN And IEEE 802.11 WLAN Compliance Test And Analysis Solution
  • FSA Announces 27 Percent Worldwide Fabless Revenue Growth in 2004
  • Texas Instruments and Imagination Technologies Create Gaming and Graphics Ecosystem Leveraging TI's OMAP 2 "All in One Mobile Entertainment" Platform
  • Rambus Appoints J. Thomas Bentley to its Board of Directors
  • Arithmatica IP selected by Xilinx for Virtex-4 XtremeDSP(TM) Slice
  • MindTree to demonstrate its Bluetooth capabilities on OMAP and Nucleus at CTIA Wireless 2005
  •    Headlines for Mar. 14, 2005
  • Limits of IP block strategy exposed
  • Knowlent Announces Opal Electrical Verification Platform and Support for PCI Express, Serial ATA
  • Video codec is a study in power
  • SigmaTel, Inc. Files Formal Complaint with ITC Against Actions Semiconductor for MP3 Player Technology Patent Infringement
  • ZAiQ Technologies and ProDesign Integrate High Speed Transaction-Based Verification System
  • Rambus Demonstrates Its 800MHz DDR2 Memory Controller Interface At Denali MemCon In Taiwan
  • MoSys 1T-SRAM IP Ships in HUDSON Soft's Video Game Controller; Video Game Controller in Volume Production Targets Toy Markets
  • NEC Electronics America Expands ASIC IP Portfolio with Tensilica’s Xtensa Configurable Processor
  • Arteris introduces industry's first products for building networks on Chip (NoC)
  • CEVA-TeakLite DSP License Extended By STMicroelectronics For Next Generation DSL Central Office Chipsets
  • Industry Study Reaffirms Reliability of Actel FPGAs Against Radiation-Induced Failures
  • LSI Logic Introduces RapidChip Xtreme2(TM) Family With Unprecedented SERDES Integration and I/O Bandwidth
  • Digital Core Design will take part in the EU Gateway to Japan
  •    Headlines for Mar. 13, 2005
  • IPCore and eMemory form alliance to provide a comprehensive single-poly OTP solution
  •    Headlines for Mar. 10, 2005
  • Research centre for SoC opens in Belfast
  • Tensilica Expands Into China
  • QuickSilver closes operations, shops IP
  • Actel Corporation Announces First Quarter Business Update
  • Why does STMicroelectronics license in FPGA blocks?
  • M2000 unveils optimized eFPGA architecture for DSP functions
  •    Headlines for Mar. 09, 2005
  • Virtual Silicon's Ground-breaking Mobilize Power Management IP Wins EDN INNOVATION Award
  • U.S. District Judge Rules to Disqualify Patriot Scientific Corporation's Counsel and to Deny Witness Testimony
  • HiTech Global Distribution expands IP Portfolio with SDIO Core
  • Further contract successes for new HyperSpeed and HyperLength FFT cores from RF Engines
  • TSMC's sales falls 18% amid silicon foundry lull
  • STMicroelectronics Introduces Highly Integrated Microcontroller with Embedded Programmable Logic for Wireless Infrastructure Applications
  • Xilinx Ships Virtex-4 SX55 - World's Fastest FPGA For DSP
  • TransChip and CEVA Collaborate to Create Highly Compact Video Streaming Solution for Multimedia Applications
  • Micronas Micronas Licenses Silicon Image's HDMI and DVI IPLicenses Silicon Image's HDMI and DVI IP
  • TSMC Monthly Sales Report - February 2005
  • Virage Logic's High-Density ASAP Memory(TM) IP Used in Development of Low-leakage Wireless Multimedia Processors From NVIDIA
  •    Headlines for Mar. 08, 2005
  • Falanx Announces Availability of Geometry Processors for Mobile Gaming
  • Memec Unique Announces Multi-Channel UART Evaluation Kit for Actel ProASIC Plus
  • Atmel's New Single-Cycle 8051 Core Provides Big Performance Boost and Low Power
  • Faraday Monthly Sales Report -- February 2005
  • Legerity Selects StarCore Technology to Power Its Next Generation VoIP and FTTP Products
  • Falanx Submits Mali IP Cores to Khronos OpenGL ES Conformance Process
  • FS2 System Navigator Delivers Multi-Core Debugging for Tensilica Xtensa Processors
  • FS2 Introduces System Navigator with PDtrace for MIPS32 24K Debug
  • Xilinx Updates Guidance for March Quarter FY05
  • Synopsys' coreAssembler Reduces Time and IP Integration Risk for Spirit-Compliant IP
  • Chipidea, Solid Silicon Technology Offer Integrated USB 2.0 and USB 2.0 OTG IP Solutions for Chartered's 0.13-Micron and 0.18-Micron Processes
  • Accelerated Technology Announces Nucleus IPC for Rapid Development of Multi-Processor Applications
  •    Headlines for Mar. 07, 2005
  • Toshiba Launches Family of SATA PHY Cores That Meet High Speed Requirements of Storage, Networking and Consumer Markets
  • Panelists peer into future of FPGAs
  • Tower aims to ship ICs made on 130-nm process in 2005
  • LSI Logic Drives High Performance Applications With Synthesized ARM1156T2-S Processor and Reference Design
  • NEC Electronics Unveils 90-Nanometer Embedded DRAM Technology
  • NEC Electronics Introduces the CMOS-12M Series of Mainstream Structured ASICs
  • Bitboys Introduces Vector Graphics Processor for Mobile Devices at Game Developers Conference
  • MIPS Technologies Teams with TimeSys to Deliver MIPS Architecture and Core-Optimized 2.6 Linux Distributions to Licensees and OEMs Worldwide
  • MIPS Architecture Selected by Infineon as Standard for its VoIP Solutions
  • Lauterbach Debugger Delivers Multi-Processor Support for Altera's Nios II Embedded Processor
  • Xilinx Virtex-4 FX FPGAs With PowerPC Processor Deliver Breakthrough 20x Performance Boost
  • ARM Discloses Technical Details and Partner Support For ARMv7 Architecture
  • ARM Announces Rapid System Prototyping Solution
  • TRIM's LTR1004 and LTR4041 Voltage Reference IPs are Available for IBM 0.13um Process Technology
  • CAST Expands USB OTG Line with New Multi-Port IP Core
  • Newest Release of SonicsMX Addresses H.264 and Legacy Interconnectivity
  • Faraday Technology Introduces Industry's Smallest USB2.0 PHY IP
  • Actel and ARM Sign Landmark Agreement to Bring ARM7 Processor Family to Burgeoning FPGA Market
  • Tensilica Names Dan Weed as Vice President of Customer Engineering
  • UMC and Virage Logic Announce Qualification of Embedded Non-Volatile Memory Technology on UMC's 0.18um Logic Process
  •    Headlines for Mar. 04, 2005
  • Costello's analog automation pioneer, Barcelona, to fold
  • Chartered updates guidance for first quarter
  •    Headlines for Mar. 03, 2005
  • austriamicrosystems launches fully automotive-qualified non-volatile process for foundry customers
  • GlobalPress Summit panelists debate route to working SoCs
  • Intel targets multithreaded software for multicore processors
  • MPEG-only bows out of codecs race; H.264 and VC-1 still contending
  • LTRIM Technologies offers a family of pure CMOS silicon proven power management analog IPs to IBM Microelectronics foundry and ASIC customers
  •    Headlines for Mar. 02, 2005
  • OCP-IP Announces Release of OCP 2.1 Specification
  • PCI Express adoption could boost TSMC in Q2, says report
  • Gurus mull challenges of 65 nm at Global Press Summit
  • HED Licenses ARM922T Processor For SoC Designs
  •    Headlines for Mar. 01, 2005
  • Design outsourcing a challenge
  • Judge Again Dismisses Rambus Patent Claims in Virginia Case
  • Genesys Logic Introduces PCI Express and GigaSata Serial ATA Products at IDF Spring 2005
  • Innotech Joins ARM Foundry Program With ARM7TDMI Microprocessor License
  • Altera's PCI Express IP Core Passes PCI-SIG February Workshop Compliance Tests
  • Altera's Stratix II Family Leads the Industry With 2X Signal Integrity Performance Over Competing FPGAs
  • Tensilica Offers Automatically Configured RTOS and Development System Support for Xtensa LX Configurable Processor
  • MIPS Technologies Launches China Operations
  • USPTO Awards ARC International Key Patent On Configurable Processor Technology
  • Prosilog announces the integration of Yogitech's OCP eVC in Magillem
  • ESL Design State of the Union 2005

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