MoSys 1T-SRAM Embedded Memory Technology Meets TSMC 90 Nanometer eDRAM Process Standards
TSMC's IP Alliance includes a quality management program that requires IP cores to demonstrate manufacturability and functionality. MoSys' 1T-SRAM memory macros have been tested and verified to Levels III and IV, including full characterization of seven-corner split wafer lots and full high temperature operating life (HTOL) testing on three distinct wafer lots.
"We are pleased to reach this important milestone in which MoSys' patented technologies were successfully incorporated into SoC designs fabricated using TSMC's 90 nm advanced processes," said Len Perham, President and Chief Executive Officer of MoSys. "By leveraging the extensive testing and stressing performed to reach TSMC Level III and IV compliance, MoSys can now more clearly demonstrate the reliability of MoSys' 1T-SRAM memories."
About MoSys, Inc.
Founded in 1991, MoSys (NASDAQ: MOSY), develops, markets and licenses innovative embedded memory and analog/mixed-signal intellectual property (IP) technologies for advanced SoCs used in a variety of home entertainment, mobile consumer, networking and storage applications. MoSys' patented 1T-SRAM and 1T-FLASH technologies offer a combination of high density, low power consumption, high speed and low cost unmatched by other available memory technologies. MoSys' advanced analog/mixed-signal technologies include a highly integrated Blu-ray DVD front-end and Gigabit Ethernet. MoSys' embedded memory IP has been included in more than 160 million devices demonstrating silicon-proven manufacturability in a wide range of processes and applications. MoSys is headquartered at 755 N. Mathilda Avenue, Sunnyvale, California 94085. More information is available on MoSys' website at http://www.mosys.com.
|
Related News
- MoSys' 1T-SRAM embedded memory silicon-verified on 90-nanometer process
- MOSYS' 1T-SRAM Embedded memory verified on TSMC's Embedded Flash process
- MoSys and TSMC Extend 1T-SRAM Embedded Memory Licensing Agreement
- MoSys And TSMC Extend Collaboration Agreement To 90-Nanometer-Based 1T-SRAM
- ARM Announces First Production-Ready DDR1 And DDR2 Memory Interface IP On TSMC 90-Nanometer Process
Breaking News
- Arm revenues up 47%; shares fall
- Sondrel awarded new Video Processor ASIC design and supply contract for a leading provider of High-Performance Video systems
- X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
- Softbank reported to be in talks to buy Graphcore
- VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Most Popular
- Synopsys Enters Definitive Agreement to Sell its Software Integrity Business to Clearlake Capital and Francisco Partners
- Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip
- sureCore announces successful tape-out of cryogenic IP demonstrator
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
E-mail This Article | Printer-Friendly Page |