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Esterel Studio, adopted at STMicroelectronics, enhances productive design for STBus and STNoC based control-intensive IP
MOUNTAIN VIEW, California, and ELANCOURT, France -- January 18, 2008 -- Esterel EDA Technologies today announced that STMicroelectronics, one of the world’s largest semiconductor suppliers, has applied Esterel Studio for the design of new components for the STBus and ST Network-on Chip (STNoC) within ST’s On-Chip Communication Systems (OCCS) team. High-bandwidth, low-power, and complex audio and video applications challenges have led to new multi-processors Systems-on-Chips incorporating a large number of multimedia processing and peripheral interface nodes. Such architectures put a heavy burden on the on-chip interconnection network, which in turn requires highly parameterizable bus-interface and controller components, all perfect design targets for Esterel Studio. STMicroelectronics’ primary objective in using Esterel Studio is to improve IP development effectiveness and efficiency, maintaining a single model for both RTL implementation and SystemC modeling. Esterel Studio generated RTL successfully and passed all synthesis performance and quality compliance criteria. Carlo Pistritto, manager of ST’s On-Chip Communication System (OCCS) team, says After having first evaluated other possible solutions available on the ESL market, we decided in early 2006 to launch two first IP designs with Esterel Studio. They both successfully completed on spec, meeting area and speed requirements. In addition, we liked the way Esterel EDA Technologies was able to quickly adapt its R&D roadmap to meet our specific requirements. We have now a clear vision of our flow using Esterel Studio and we will continue our collaboration with Esterel EDA Technologies R&D teams to integrate additional advanced features. STMicroelectronics’ OCCS team provides the interconnect technology to enable ST design teams to quickly configure and assemble IPs for complex Systems on Chip (SoC). The team qualified that Esterel Studio designs smoothly integrate with their highly automated platform evaluation and implementation flow. I am very satisfied that we, in a short period of time, developed new product features to provide configurable RTL generation to ST, while demonstrating smooth interoperability with Synopsys core tools using the IP-XACT™, format from The SPIRIT Consortium™, says Gunther Siegel, Esterel Studio CTO. About Esterel EDA Technologies Esterel EDA Technologies, a subsidiary of Esterel Technologies SA, is a privately held company with headquarters in Elancourt, France and R&D facility and sales office in Villeneuve-Loubet, France.
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