Network on Chip
Moderated by:
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Huy Nam Nguyen, Bull S.A.S.
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Panelists:
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K. Charles Janac
Arteris
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Alain Greiner
UPMC/LIP6
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David Fritz
Silistix
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Marcello Coppola
ST-Microelectronics
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Oliver Bringmann
FZI Forschungszentrum Informatik
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Fabien Clermidy CEA/Leti
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Progress in semiconductor technology enables the integration of thousands of resources on a single SoC. Managing this increasing complexity requires the separation of computation from communication.
NoC is emerging as an alternative to existing on-chip communications to be used in many important applications (automotive, communication, ..) for connecting large amount of heterogeneous IPs.
NoC concepts share many issues in common with existing topics (eg. computer networking) but still require specific considerations on :
- Network protocol design decomposed into the 7 layers OSI reference model and including routing strategiesto support Quality of Service (QoS) in relation with the network topology and architecture,
- Network interfaces to convert IP communication protocols (eg. standards such as AHB,AXI,OCP..)to the router protocol and to perform clock domain bridging (eg. for the GALS- Globally Asynchronous, Locally Synchronous- paradigm).
In addition to the conceptual and architectural aspects, discussions on NoC may be extended to design methodologies due to the specific suitability of NoC to platform-based and TLM approaches.
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