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(Active
Interconnect)
Definition
- Active
circuit on a semiconductor device whose purpose is to manage information
flows between functional portions of that semiconductor device
- Independence
of operation from any functional blocks
- Processor
agnostic
- Communication
centric: Management of the information flow using techniques that are
not necessarily those used by any of the functional blocks - decouples
the interconnect from the sub-systems (IP cores)
- Inter
core communication systems relying on standard protocol stacks to communicate
between devices
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Common
Characteristics
- Non-blocking
interconnect architecture using a split-transaction protocol to communicate
between subsystems on chip
- Scalable,
highly configurable inter-core communication system
- Guarantees
end-to-end performance and real-time quality of service
- The interconnect
adapts itself to the needs of the IP cores in the system and not vice
versa
- Supercedes
classical bus architectures
Available Solutions
Commercially
available:
- SiliconBackplane
MicroNetwork™
(Primary Interconnect: Many Masters, Many Slaves; High Bandwidth, High
Speed)
www.sonicsinc.com
- Synapse™
3220 SMART Interconnect IP™
(Secondary Interconnect: Small number of Masters; Large number of Slaves;
Low bandwidth for lower speed peripherals)
www.sonicsinc.com
“Research
& Development”
Alternative Solutions
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