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- Traffic Analysis for On-chip Networks Design of Multimedia Applications
Girish Varatkar Radu Marculescu
Department of Electrical and Computer Engineering
Carnegie Mellon University
Pittsburgh, PA 15213-3890
{gvv,radum}@ece.cmu.edu
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A Scalable High-Performance Computing Solution for Networks on Chips
IEEE
Computer Society
- A
Network on Chip Architecture and Design Methodology
IEEE Computer Society
- An
Adaptive Low Power Transmission Scheme for On-chip Networks
Frederic Worm, Paolo Ienne, Patric Thiran, Giovanni De Micheli, International
System Synthesis Symposium, October 2002 (PDF)
-
Low-Power Error Resilient Encoding for On-chip Data Buses''
D. Bertozzi, L. Benini and G. De Micheli, DATE - International Conference
on Design and Test Europe, 2002
Paper
(PDF)
Slides
(PDF)
- Analysis
of Power Consumption on Switch Fabrics in Network Routers
Terry Tao Ye, Luca Benini, Giovanni De Micheli; Design Automation Conference,
2002
Paper
(PDF)
Slides
(PDF)
- SystemC
based SoC Communication Modeling for the OCP Protocol (PDF)
- The
Importance of Sockets in SOC Design (PDF)
- Socket-Centric
IP Core Interface Maximizes IP Applications
Reprinted article offering a perspective on the benefits of the OCP
socket (PDF)
- On-Chip
Communication Architectures
Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based
Design
DAC 2001 conference:
Kurt Keutzer; Jan Rabaey; Alberto L. Sangiovanni-Vincentelli; - Univ.
of California, Berkeley, CA
Sharad Malik - Princeton Univ., Princeton, NJ
Paper
(PDF)
Slides
(PDF)
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