CAST Introduces the First Lossless JPEG (LJPEG) IP Cores
January 31, 2005 (DesignCon) Santa Clara, California — Semiconductor intellectual property (IP) provider CAST, Inc. today announced IP cores that encode and decode image data using standard Lossless JPEG (LJPEG) processing.
Lossless JPEG was added to the JPEG standard in 1995 to allow for image compression with no loss of information. The new cores, the LJPEG-E Encoder and the LJPEG-D Decoder, provide a stand-alone implementation of lossless compression that is faster and more compact than can be achieved using other technologies. The Encoder, for example, is small enough to fit in standard FPGAs and performs up to 120 MSamples/sec. This makes the LJPEG-E and LJPEG-D cores good low-cost choices for applications requiring high-speed performance with 100% image fidelity, including medical, military, and space imaging; studio-quality cameras and editing suites; and high-end film and photo scanners.
The company believes these are the first commercially available implementations of the LJPEG standard. Customers may choose from economical netlists for FPGAs (available now) or synthesizable HDL format for ASICs (available Q2 2005). The extensively-verified cores come complete with full documentation and a comprehensive test environment that includes a bit-accurate model.
About the LJPEG-E and LJPEG-D IP Cores
The new LJPEG cores conform to the spatial (sequential) lossless encoding mode (SOF3) of the ISO/IEC 10918-1 standard (CCITT T81 recommendation). The Encoder core accepts pixel input and produces a standard ISO/IEC 10918-1 JPEG stream; the Decoder does the same in reverse. The Encoder delivers compression ratios on the order of 1.4:1.
Two other standard methods for performing lossless JPEG compression, JPEG-LS (ISO/IEC IS 14495-1) and JPEG 2000 (SO/IEC 15444-1), use significantly more complex arithmetic than is required for LJPEG. Available JPEG-2000 cores also accommodate lossy compression and include other advanced features not essential for lossless compression, so they result in larger and slower chips.
Evaluation designs using the new LJPEG cores show the benefits of their compact, high-performance architecture: the following are sample results (using balanced area/speed constraints and assuming that all core I/O is routed off-chip).
Technology | Size | Speed (MSamples/sec) | |
LJPEG-E Encoder | ASIC (0.18µ process) | 32,000 gates | 300 |
Altera Cyclone II | 4956 ALUTs | 79 | |
Altera Stratix II | 3980 ALUTs | 120 | |
Xilinx Spartan-3 | 3034 slices | 58 | |
LJPEG-D Decoder | ASIC (0.18µ process) | 66,000 gates | 200 |
Altera Cyclone II | 6903 ALUTs | 41 | |
Altera Stratix II | 4864 ALUTs | 70 | |
Xilinx Spartan-3 | 4111 slices | 34 |
The LJPEG cores are developed by CAST’s long-time multimedia IP partner ALMA Technologies in Greece (www.alma-tech.com)
About CAST, Inc.
CAST provides about 100 popular and standards-based IP cores for ASICs and FPGAs. Privately owned and operating since 1993 with a focus on making IP practical and affordable, CAST has established a reputation for high-quality IP products, simple licensing, and responsive technical support. The company is headquartered near New York City, partners with IP developers around the world, and works with select sales consultants and distributors throughout Europe and Asia.
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