APIs can help handle FPGA complexity, says Xilinx CTO

APIs could be the best way to handle the growing complexity of FPGAs which are looking more and more like systems, according to Ivo Bolsens, chief technology officer of Xilinx, who provided a keynote talk to the IP-SOC conference here.

Today FPGAs they can contain one or more diffused PowerPC processor, soft processors, slices of DSP multipliers, distributed memory, and high speed serial I/Os on board, making processor plus peripheral design models close to being out of date.

In response to a question from the floor about the use of a defined intermediate software layer above the FPGA, providing context within which to configure hardware and a definition to write software to, Ivo Bolsens said: "Xilinx is starting to do this. In the area of DSP we are starting to provide a layer to abstract away the details of the fabric. We are working on similar techniques for network processing."

Bolsens opened his talk with a general description of the modern FPGA's capability and complexity. "These are not your fathers' FPGAs. They have evolved into system-level platforms," he said. He went on to argue that "programmable fabrics" would be a better name for modern devices than FPGAs and that these programmable fabrics could go forward to power a new business model to augment IDMs and the partnership of the fabless and the foundries. In this new model small companies would buy programmable chips made in very high volumes and therefore at low cost and customize them by configuration and basic software additions to produce high value components for onward sale, Bolsens argued.

"The FPGA maker would have dealt with all the manufacturing issues, cross-talk and IR drop and so on," Bolsens pointed out.

Bolsens also reminded his audience of the further advantage of reconfigurability that comes with programmable fabrics. "80 percent of Xilinx customers are using field upgradeability as a feature in their products."

As the company has grown it is more able to sustain a variety of device types, although the challenge of picking the best variants to meet customer needs while achieving high volume remains, Bolsens said. The company is now producing domain-optimized variants of its Virtex-4 range, Bolsens said.

"You need a single environment for hardware and software development, for automatic generation of the board support package," Bolsens said prompting the question about APIs.

As other questions come in at the end of Bolsens' talk, one was related to FPGA's notorious inefficiency in terms of die area, transistor count and power consumption, compared with highly optimized SOCs.

Bolsens acknowledged that power was a challenge for FPGAs but argued that Xilinx was already making efforts to strip out sources of unnecessary losses in its architectures.