Elixent launches next generation Reconfigurable Algorithm Processor technology
The D-Fabrix v2.0 architecture allows designers to implement signal processing algorithms in half the silicon area required by previous reconfigurable systems, and with substantially reduced power consumption.D-Fabrix v2.0 has been developed after a detailed analysis of Elixent customers’ applications of reconfigurable processing, focusing in particular on the needs of the mobile multimedia and communications. Products in this field increasingly need to serve a variety of functions – for instance combining a camera with a mobile telephone – and hence require chips which can implement a corresponding range of signal processing algorithms.
The new architecture includes improved routing and switching resources and extra support for bit-level operations. The result is an effective doubling of performance density over a range of common signal processing algorithms – although some functions may see the silicon area required reduced by as much as a factor of four.
In addition, power requirements are typically a third lower than the previous version of D Fabrix (v1.2) where lower power was already a major feature. In combination, these advances make reconfigurable processing a real cost-saving alternative for ASIC designers in mobile multimedia and communications applications.
“D-Fabrix v2.0 changes the cost equation for SoC designers,” said Kenn Lamb, CEO of Elixent. “It brings reconfigurable processing into the mainstream of algorithm processing, with savings for the designer in terms of device real-estate and power consumption.”Will Strauss, President of Forward Concepts Co., said, "There have been many attempts at building viable reconfigurable platforms. Based on the announcements to date, it looks like Elixent may be the first to move the capability into high volume consumer applications."
Key Elixent customers are already designing with D-Fabrix v2.0, which is fully supported by Elixent’s comprehensive design tool chain. The architecture is available on widely variant 130nm processes from a number of manufacturers.
About Elixent
Elixent is the leading supplier of production-ready reconfigurable semiconductor IP, a technology that provides users with the ability to change the function of a chip even whilst in use. D-Fabrix, the company’s patented reconfigurable algorithm processing (RAP) technology, provides ASIC designers with a flexible alternative to fixed function chips but without consuming the level of power normally associated with programmable technologies.This combination is of particular benefit to companies producing electronic products for imaging and communications applications in consumer and industrial markets. The low power consumption makes D-Fabrix particularly attractive for mobile and battery powered products.
Elixent is working with a number of tier one semiconductor manufacturers, including Panasonic and Toshiba. Visit http://www.elixent.com for more information.
|
Related News
- Accelchip and Elixent form alliance to provide direct implementation path from Matlab to reconfigurable algorithm processing IP
- Intel launches compact RISC-V Nios processor core
- Bluespec Launches New MCUX RISC-V Processor That Enables Developers to Implement Custom Instructions and Add Accelerators
- Quantware Launches the World's First Commercially Available Superconducting Quantum Processors, Accelerating the Advent of the Quantum Computer.
- Allwinner launches the first RISC-V application processor
Breaking News
- Arm revenues up 47%; shares fall
- Sondrel awarded new Video Processor ASIC design and supply contract for a leading provider of High-Performance Video systems
- X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
- Softbank reported to be in talks to buy Graphcore
- VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Most Popular
- Synopsys Enters Definitive Agreement to Sell its Software Integrity Business to Clearlake Capital and Francisco Partners
- Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip
- sureCore announces successful tape-out of cryogenic IP demonstrator
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
E-mail This Article | Printer-Friendly Page |