OCP-IP Announces Availability of Mentor Graphics CheckerWare Library of Verification IP
The CheckerWare monitor is an advanced verification technology that can be used to verify OCP during simulation and formal functional verification. Additionally, the monitor collects detailed coverage information, such as protocol interface behaviors of industry standard interfaces, to identify coverage weaknesses in the user’s verification scheme. CheckerWare components are added to the designs and used throughout the verification flow. This in turn facilitates faster more complete verification, and ensures that devices fully comply with the OCP specification.
“OCP has a robust, thriving infrastructure supported by many independent companies such as Mentor that provide excellent services and products,” said Ian Mackintosh, president OCP-IP. “This is a testament to the tremendous adoption we have seen throughout the industry.”
“Mentor Graphics is proud of being a contributor to the OCP-IP organization, with OCP as a leading interconnect to our customers designing complex SoCs,” stated Steve White, general manager of Mentor Graphics’ 0-In Functional Verification business unit, which provided the CheckerWare library. “The addition of the CheckerWare OCP monitor enables these customers to quickly adopt the advanced methodologies needed to reach verification closure.”
About OCP-IP
The OCP International Partnership Association, Inc. (OCP-IP), formed in 2001, promotes and supports the Open Core Protocol (OCP) as the complete socket standard ensuring rapid creation and integration of interoperable virtual components. OCP-IP's Governing Steering Committee participants are: Nokia [NYSE: NOK], Texas Instruments [NYSE: TXN], ST Microelectronics [NYSE: STM], Toshiba Semiconductor Group (including Toshiba America TAEC), and Sonics. OCP-IP is a non-profit corporation delivering the first fully supported, openly licensed, core-centric protocol comprehensively fulfilling system-level integration requirements. The OCP facilitates IP core reusability and reduces design time, risk, and manufacturing costs for SoC designs. VSIA endorses the OCP socket, and OCP-IP is affiliated with the VSI Alliance. For additional background and membership information, visit www.OCPIP.org.
|
Related News
- Mentor Graphics, Northwest Logic, and Krivi Semiconductor Announce Availability of Complete DDR4 SDRAM IP Design and Verification Solution
- Mentor Graphics Adds Memory Models to Create Industry's First Complete UVM SystemVerilog Verification IP Library
- Mentor Graphics Adds MIPI Protocol Verification IP to the Questa Verification IP Library
- Mentor Graphics Adds AMBA 4 Verification IP to the Questa Multi-view Verification Components Library
- Mentor Graphics Expands Questa Multi-view Verification Components Library to Support a Larger Set of Standard Protocols
Breaking News
- Arm revenues up 47%; shares fall
- Sondrel awarded new Video Processor ASIC design and supply contract for a leading provider of High-Performance Video systems
- X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
- Softbank reported to be in talks to buy Graphcore
- VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Most Popular
- Synopsys Enters Definitive Agreement to Sell its Software Integrity Business to Clearlake Capital and Francisco Partners
- Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip
- sureCore announces successful tape-out of cryogenic IP demonstrator
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
E-mail This Article | Printer-Friendly Page |