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By Harmel Sangha, Director, CoreWare IP Marketing, LSI Logic,USA
Harmel Sangha
Harmel Sangha is responsible for CoreWare® Marketing, Product Management, Field CoreWare Engineering and High Speed I/O Applications Engineering aspects of the business. His team is charged with defining, developing, acquiring and enabling the IP (intellectual property) building blocks required for customers to differentiate their products and address time-to-market, performance, features and cost objectives.
Sangha joined LSI Logic in 1997 as an engineering manager to lead the Serial Protocols Development team. His team has developed and deployed Fibre Channel and PCI Express industry standards-based single and multi-lane serial protocol controllers in numerous customer products. His prior positions have included senior engineering and architect assignments at Seagate Technology and IBM UK Labs Ltd., in the areas of enterprise Hard Disk Drive Controller developments for SCSI and SSA interface technologies.
Sangha earned his bachelor of science degree in Electronic and Communications Engineering at Leeds Metropolitan University, Leeds, U.K.
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Abstract:
As next generation system architectures transition from parallel bus to high performance serial interconnect architectures, to provide required performance enhancements, gigabit serdes integration in Platform ASICs has received much interest. In this key note presentation, Mr. Sangha, LSI Logic director of CoreWare IP marketing, discusses how current and future technology offerings address the industry’s needs.
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