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By Gabriele Saucier, Chairman of the Board, Design And Reuse, France
Gabriele Saucier
Gabriele Saucier got her PHD at the university of Grenoble where she was a
professor and head a research lab on Integrated System Design. She published
more than 350 papers in the design and EDA field. She is a IEEE fellow for
her contributions in synthesis, test generation an fault tolerance.
Leaving her university carreer, she founded in the nineties a synthesis
company IST (for Innovative Synthesis Technologies) mainly dedicated to
FPGA synthesis and in 1997 Design And Reuse dedicated to IP based design.
She
launched 2 succesful conferences namely EuroASIC and IP/SoC
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Abstract:
D&R has as mission to promote IP based design practices around the world, to
assist the IP/SoC community to define and establish best practices, to
offer relevant services and technology, and finally to trigger IP based
business.
Along the 7 last years D&R delivered various services to the IP/SoC
community for this purpose while following the evolution and progresses
made in the reuse field.
D&R presents in this keynote talk an overview and state of the art of these
services mainly devoted to IP publishing, IP cataloguing, IP packaging and IP
delivery.
D&R strongly supports standardized exchange practices and contributes
strongly by adding its 7 years of experience.
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