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ESL design is a highly-effective approach for creating complex chips and systems. ESL design has mainstreamed—it is now an established design methodology at most of the world’s leading system-on-chip (SoC) design companies, and it is being used increasingly in system design. To learn more about ESL, read the ESL Design State of the Union 2005 This corner will bring to your attention the latest News, latest products, latest initiative in this field and favor exchange across the IP/SOC community worldwide. Featured IPs: Architectural SystemC Models from ARM Ltd. ARM AMBA 2.0 HDL Generator from CoWare Inc. ARM Interconnects TLM SystemC Library from CoWare Inc. ARM Peripherals TLM SystemC Library from CoWare Inc. ARM Processors TLM SystemC Library from CoWare Inc. Broad portfolio of tool-independent transaction-level models (TLMs) for the creation of virtual platforms from Synopsys, Inc. CEVA Processors TLM SystemC Library from CoWare Inc. IBM PPC Processors TLM SystemC Library from CoWare Inc. More ... Featured EDA Tools: Software models of complete systems that provide software engineers with high-speed, pre-silicon software execution environments that allow the development of SoC-related software before hardware is available from Synopsys, Inc. Powerful, fully integrated tool environment for developing, running and debugging virtual platforms from Synopsys, Inc. VirtualICE from Yokogawa Electric Corporation Virtual Platform Capture and Packaging for Distribution from CoWare, Inc. Virtual Component Co-Design Tools (VCC) from Cadence Design Systems, Inc. Validating Software Earlier, Better, More Reliably from CoWare, Inc. User Retargetable Development Tools from Archelon Inc. unified HW/SW co-verification tool from Adveda More ...

Sponsor Link: Read CoWare's TLM Peripheral Modeling for Platform-Driven ESL Design Using the SystemC Modeling Library White Paper This article provides an overview of a SystemC-based Transaction Level Modeling (TLM) methodology for the rapid creation of SoC platform models. First a brief overview of the ESL design tasks and the corresponding modeling requirements is given. The main topic is a methodology for the efficient creation of transaction-level peripheral models. Those are usually specific for a particular SoC platform and have to be created by the ESL user. Latest News: ChipVision Delivers Two Breakthrough ESL Power-Optimization Design Tools for Meeting Critical Power Budgets (Apr. 22, 2008) CoWare Introduces First Ever Checkpoint / Restart Capability for Native SystemC Virtual Platforms (Apr. 14, 2008) NXP and CoWare Establish Strategic Relationship for the Company Wide Deployment of ESL Technologies (Apr. 07, 2008) CoWare and Sonics Release ESL 2.0 Upgrade of Joint Flow (Mar. 26, 2008) VaST and NEC Electronics America Develop Models of V850-Based Microcontrollers for Leading Automotive Customers (Mar. 17, 2008) Industry Articles : How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 1 (May. 01, 2008) SystemC: Key modeling concepts besides TLM to boost your simulation performance (Mar. 24, 2008) Electronic system-level approach shortens SoC design (Feb. 14, 2008) Hardware design using ESL (Feb. 11, 2008) Fast virtual platforms open up multicore software development (Feb. 11, 2008)