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Articles for the Week of Apr. 30, 2007
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Featured Article
Comprehensive Change Management for SoC Design
Systems-on-a-Chip (SoC) are becoming increasingly complex, leading to corresponding increases in the complexity and cost of SoC design and development. We propose to address this problem by introducing comprehensive change management. Change management, which is widely used in the software industry, involves controlling when and where changes can be introduced into components so that changes can be propagated quickly, completely, and correctly. |
Additional Articles |
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IP Core for an H.264 Decoder SoC |
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Video codecs in SoCs using OCP-based programmable accelerator design |
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How to build ultra-fast floating-point FFTs in FPGAs |
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Articles for the Week of Apr. 26, 2007
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Featured Article
Silicon IP for Programmable Baseband Processing
An efficient IP reuse strategy relies on IP blocks with wide applicability. That makes generic blocks, such as programmable processors preferable. However, in many applications such as handheld wireless terminals, additional silicon area and power consumption compared to fixed function solutions can not be accepted. |
Additional Articles |
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DPCI: An Efficient Scalable System-on-chip Communication Architecture |
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A tutorial on tools, techniques, and methodology to improve FPGA designer productivity |
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Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2 |
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How to write an optimized FIR filter |
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Articles for the Week of Apr. 19, 2007
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Featured Article
Transaction Recording, Modeling and Extensions for SystemVerilog
This paper discusses ways to improve the adoption rate by improving the usability and simplifying the modeling concepts. Using SystemVerilog we demonstrate a simplified PLI interface for recording transactions and we extend previous language standard changes to improve automation. |
Additional Articles |
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Unifying Diversity -- A classic example of Reusability |
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Hardware and software don't matter |
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Capturing and Sharing Intellectual Property in PCB Design |
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Get multicore performance from one core |
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Programmable Logic: FPGAs get flexible for PCI Express |
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The value of selecting IP based on a platform |
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Articles for the Week of Apr. 12, 2007
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Featured Article
Deploying Mixed Signal IP -- Is ''No Re-Spin'' Just Spin ?
One of the key benefits for the customer in the growth of the IP market has been the increasing availability of silicon proven high performance data converters, typically the bottleneck in overall system performance. So has the mixed signal IP business removed the need for the traditional mixed mode SOC re-spin? |
Additional Articles |
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A Central Caching Network-on-chip Communication Architecture Design |
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How to test the interconnections between FPGAs on a high-density FPGA-based board |
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Improving ASIC Design Verification using FPGAs and Structured ASICs |
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The Growing Need for Secure Storage in Automotive Systems |
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Going multicore presents challenges and opportunities |
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Articles for the Week of Apr. 05, 2007
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Featured Article
Integrating PCI Express IP in a SoC
Due to protocol flexibility and the wide range of supported applications, PCI Express IP usually provides extensive configurability options for optimizing the PCI Express solution for the application's needs. This paper elaborates on the PCIe IP parameterization process and provides useful tools for the PCIe solution evaluation, specification, and verification. |
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Remote Testing and Diagnosis of system-On-Chips Using Network Management Frameworks |
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Expanding applications for low-cost FPGAs |
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Utilizing FPGAs in an IEEE 1588 precision time control implementation |
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Integrating and evaluating speech algorithms |
